First step into the FPGA engineering world. I’ve been really interested in digital design for a while now and this seemed like a great project to start on. There were a lot of things to learn and a lot of issues to deal with, but it all worked out in the end.

function

  1. Classic 2-Player PONG game running through the Go Board’s Lattice iCE40HX1k FPGA.
  2. Inputs through keyboard (using UART) and the on-board buttons for player paddle control.
  3. Outputs the game through VGA display and the score through the on-board seven segment display.
  4. Change color by pressing Q,W,E,R and, T to start the game using Tera Term (115,200 Baud rate). Use respective buttons to control the paddles on each side.

what i learned

  1. Testbenching, combinational and sequential behavioral code, FSMs in VHDL.
  2. Digital button debounce filtering implemented through an FPGA.
  3. UART Rx/Tx protocol.
  4. VGA interface timing and output.
  5. The overall FPGA/VHDL design process.

resources

notes

For use with Go Board. Using this on another FPGA will need to have the IO identifiers adjusted to match the constraints file and use a 25MHz clock to drive the UART and VGA properly. For anyone also using the Go Board. VHDL is not case sensitive but iCEcube2 is! Your inputs and outputs must exactly match the ones on the constraint file.

I wanted to further my digital design learning, so I went ahead and bought a Go Board which is very accessible for beginners and chose to learn VHDL because it’s the first HDL introduced in my university. I followed the tutorials on NandLand, but chose to modify some parts and made my own modules so I can try stuff on my own. For this project, I chose to use the provided UART Rx/Tx module as suggested. I plan on trying to implement it on my own and update accordingly in the future.

I wasn’t a fan of having 3 different modules for VGA, I’ve made my own VGA Driver module that essentially combines the ‘Sync Pulse’, ‘Sync to Count’ and ‘Sync Porch’ modules with some additional logic to properly drive the RGB signals at the right time (RGB signals MUST be low during inactive time). This is used to directly drive the VGA port. Can be used for other projects on the Go Board or other FPGA dev boards as long as you use a 25MHz clock to drive it.

The creator of the Go Board also left some suggestions on improving the Pong game. I implemented the color selecting through keyboard and UART and, used the seven segment display as a score tracker.

future improvements

  1. Rainbow mode - With 9 bits of RGB, it is possible to cycle through all 512 colors as the game goes or when someone scores a point.
  2. AI - It should be pretty straightforward to implement simple AI that checks the ball’s Y coordinate and adjust itself accordingly.
  3. Additional colors - It’s trivial to add more colors at this point. Just need to expand the width of the output of the UART decoder and include the additional colors in the Color MUX.
  4. Higher resolution - the Go Board can output 640x480 at 60Hz but currently the game is downscaled to 40x30. A few edits to the constants in the package and the signals, it should be easy to upscale it.

images

PONG RTL Diagram

RTL